An insulated-gate field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate to control an underlying surface channel joining a source and a drain. The channel, source and drain are located in a semiconductor substrate, with the source and drain being doped oppositely to the substrate. The gate is separated from the semiconductor substrate by an insulating layer such as a gate oxide. The operation of the IGFET involves application of an input voltage to the gate, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
In typical IGFET processing, the source and drain are formed by introducing dopants of second conductivity type (P or N) into a semiconductor substrate of first conductivity type (N or P) using a patterned gate as a mask. This self-aligning procedure tends to improve packing density and reduce parasitic overlap capacitances between the gate and the source and drain.
Once formed IGFETs must be wired together in order to complete functional circuits. The materials, methods, and processes of “wiring” the component parts together is generally referred to as metallization. Prior to the development of very large scale integration (VLSI)-level circuits, the primary metallization material was pure aluminum (Al). Today's metallization processes, however, have evolved from the simple one level pure aluminum process.
Several objectives have influenced IGFET design and fabrication changes. These include; a drive for increased circuit density, an increase in the number of surface layers, and the miniaturization of individual components. The miniaturization of individual components equates to placing a greater number of IGFETs on a single chip. This in turn produces increased circuit density and yields greater functionality per chip. A further objective is to improve the performance, and particularly the speed, of the IGFET transistors. This pursuit is manifested by shorter conduction channel lengths and through efforts to obtain low contact resistivity at the IGFET junctions. These aspects offer increased IGFET speed and allow for a greater number of operations to be performed by the IGFET in less time. IGFETs are used in great quantity in computers where the push to obtain higher operation cycle speeds demands faster IGFET performance. In these efforts, it is desirable to keep costly IGFET fabrication steps to a minimum.
Contact resistance between the IGFET and different metallization layers presents a particularly difficult hurdle for further IGFET design evolution. The contact resistance is influenced by the materials, the substrate doping and the contact dimensions. The contact dimensions are typically referred to as the aspect ratio of the contact. The aspect ratio is given by the equation: Aspect Ratio=(Width of the opening)/(the Height of the opening), (AR=W/T). The smaller the contact size or the higher the aspect ratio of the contact opening, the higher the resistance. Modern dynamic random access memory (DRAM) design often necessitates IGFETs to be formed with high aspect ratio contact openings to accommodate other components of the device. The cumulative effect of all the individual contact resistances can dominate the conductivity of the metal system. In effect, contact resistance has become the dominant factor in ultra large scale integration (ULSI) metal system performance. Aluminum-silicon (Al—Si) contact resistance, along with its concomitant problems of electromigration and eutectic alloying have led to investigation of other contact materials for use in VLSI and ULSI metallization.
A continual need exists for creating improved junctions between the IGFET structures and subsequent metallization layers. Thus, it is desirable to uncover new material combinations and methods for processing the same which will reduce the contact resistivity between the IGFET device and subsequent metallization layers. Further, a method is desirable to achieve the above mentioned results while keeping costly fabrication steps to a minimum.